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CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP

CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP

MOQ: 10PCS
Price: NEGOTIABLE
Standard Packaging: 117PCS/BOX
Delivery Period: 2-3DAYS
Payment Method: T/T, Western Union
Supply Capacity: 1170PCS
Detail Information
Place of Origin
CHIAN
Brand Name
Texas Instruments
Certification
ROHS
Model Number
CD54HCT573F3A
Product Category:
Latches
Number Of Circuits:
1 Circuit
Logic Type:
CMOS
Logic Family:
HCT
Polarity:
Non Inverting
Quiescent Current:
8 UA
Number Of Output Lines:
8 Line
High Level Output Current:
- 6 MA
Low Level Output Current:
32mA
Propagation Delay Time:
35 Ns At 4.5 V
Supply Voltage - Max:
5.5 V
Supply Voltage - Min:
4.5 V
Minimum Operating Temperature:
- 55 C
Maximum Operating Temperature:
+ 125 C
Height:
4.57mm
Length:
24.2 Mm
Output Type:
3-State
Type:
D-Type
Width:
6.92 Mm
Mounting Style:
Through Hole
Number Of Channels:
8 Channels
Number Of Input Lines:
8 Line
Operating Supply Voltage:
5 V
Product Type:
Latches
Reset Type:
No Reset
Factory Pack Quantity:
1
Highlight:

CD54HCT573F3A Texas Instruments Latches

,

Non Inverting Texas Instruments Latches

,

20 CDIP Logic Octal Latch

Product Description

CD54HCT573F3A Texas Instruments Latches High Speed CMOS Logic Octal Transparent Latch with 3-State Output 20-CDIP

 

1. 4.5-V to 5.5-V VCCOperation
DWide Operating Temperature Range of−55°C to 125°
Balanced Propagation Delays andTransition Times
Standard Outputs Drive Up To 10 LS-TTLLoads
Significant Power Reduction Compared toLS-TTL Logic ICs
Inputs Are TTL-Voltage Compatible

2. description/ordering information

The ’HCT573 devices are octal transparent D type latches. When the latch-enable (LE) inputis high, the Q outputs follow the data (D) inputs.When LE is low, the Q outputs are latched at thelogic levels of the D inputs.A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (highor low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus linessignificantly. The high-impedance state and increased drive provide the capability to drive bus lines withoutinterface or pullup components.OE does not affect the internal operations of the latches. Old data can be retained or new data can be enteredwhile the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver

CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP 0

 

 

 

.CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP 1

 

3.

Q1. What is your terms of packing?

A: Generally, we pack our goods in neutral white boxes and brown cartons. If you have legally registered patent, we can pack the goods in your branded boxes after getting your authorization letters.

 

Q2. What is your MOQ?

A:We provide you small MOQ for each item, it depends your specific order!

 

Q3. Do you test or check all your goods before delivery?

A: Yes, we have 100% test and check all goods before delivery.

 

Q4: How do you make our business long-term and good relationship?

We keep good quality and competitive price to ensure our customers benefit ;

We respect every customer as our friend and we sincerely do business and make friends with them,It's not something that can be replaced.

 

Q5: How to contact us?
A: Send your inquiry details in the below,Click "Send"Now!!!

 

CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP 2

products
PRODUCTS DETAILS
CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP
MOQ: 10PCS
Price: NEGOTIABLE
Standard Packaging: 117PCS/BOX
Delivery Period: 2-3DAYS
Payment Method: T/T, Western Union
Supply Capacity: 1170PCS
Detail Information
Place of Origin
CHIAN
Brand Name
Texas Instruments
Certification
ROHS
Model Number
CD54HCT573F3A
Product Category:
Latches
Number Of Circuits:
1 Circuit
Logic Type:
CMOS
Logic Family:
HCT
Polarity:
Non Inverting
Quiescent Current:
8 UA
Number Of Output Lines:
8 Line
High Level Output Current:
- 6 MA
Low Level Output Current:
32mA
Propagation Delay Time:
35 Ns At 4.5 V
Supply Voltage - Max:
5.5 V
Supply Voltage - Min:
4.5 V
Minimum Operating Temperature:
- 55 C
Maximum Operating Temperature:
+ 125 C
Height:
4.57mm
Length:
24.2 Mm
Output Type:
3-State
Type:
D-Type
Width:
6.92 Mm
Mounting Style:
Through Hole
Number Of Channels:
8 Channels
Number Of Input Lines:
8 Line
Operating Supply Voltage:
5 V
Product Type:
Latches
Reset Type:
No Reset
Factory Pack Quantity:
1
Minimum Order Quantity:
10PCS
Price:
NEGOTIABLE
Packaging Details:
117PCS/BOX
Delivery Time:
2-3DAYS
Payment Terms:
T/T, Western Union
Supply Ability:
1170PCS
Highlight

CD54HCT573F3A Texas Instruments Latches

,

Non Inverting Texas Instruments Latches

,

20 CDIP Logic Octal Latch

Product Description

CD54HCT573F3A Texas Instruments Latches High Speed CMOS Logic Octal Transparent Latch with 3-State Output 20-CDIP

 

1. 4.5-V to 5.5-V VCCOperation
DWide Operating Temperature Range of−55°C to 125°
Balanced Propagation Delays andTransition Times
Standard Outputs Drive Up To 10 LS-TTLLoads
Significant Power Reduction Compared toLS-TTL Logic ICs
Inputs Are TTL-Voltage Compatible

2. description/ordering information

The ’HCT573 devices are octal transparent D type latches. When the latch-enable (LE) inputis high, the Q outputs follow the data (D) inputs.When LE is low, the Q outputs are latched at thelogic levels of the D inputs.A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (highor low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus linessignificantly. The high-impedance state and increased drive provide the capability to drive bus lines withoutinterface or pullup components.OE does not affect the internal operations of the latches. Old data can be retained or new data can be enteredwhile the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver

CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP 0

 

 

 

.CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP 1

 

3.

Q1. What is your terms of packing?

A: Generally, we pack our goods in neutral white boxes and brown cartons. If you have legally registered patent, we can pack the goods in your branded boxes after getting your authorization letters.

 

Q2. What is your MOQ?

A:We provide you small MOQ for each item, it depends your specific order!

 

Q3. Do you test or check all your goods before delivery?

A: Yes, we have 100% test and check all goods before delivery.

 

Q4: How do you make our business long-term and good relationship?

We keep good quality and competitive price to ensure our customers benefit ;

We respect every customer as our friend and we sincerely do business and make friends with them,It's not something that can be replaced.

 

Q5: How to contact us?
A: Send your inquiry details in the below,Click "Send"Now!!!

 

CD54HCT573F3A Texas Instruments Latches Non Inverting CMOS 20 CDIP 2

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