|Place of Origin:||T/W|
|Minimum Order Quantity:||10PCS|
|Payment Terms:||T/T, Western Union|
|Product Category:||Processors-Specialized Applications||Installation Style:||SMD/SMT|
|Package/Box:||CSBGA-484||Applications:||Automotive, Infotainment Applications|
|Core:||ARM Cortex A9||Number Of Cores:||2 Core|
|Data Bus Width:||32 Bit||Maximum Clock Frequency:||667 MHz|
|L1 Cache Instruction Memory:||32 KB, 32 KB||Data RAM Size:||256 KB|
|Interface Type:||CAN, Ethernet, GPIO, SDIO, UART, USB||Number Of Inputs/outputs:||200 I/O|
|I/O Voltage:||1.2 V To 3.3 V||L2 Cache Instruction/data Memory:||512 KB|
|Processor Series:||Zynq-7000 SoC||Factory Pack Quantity:||84|
ARM Cortex A9 IC,
2 Core Integrated Circuits
XC7Z020-1CLG484I Xilinx Processor dedicated XC7Z020-1CLG484ICAN, Ethernet, GPIO, SDIO, UART, USB
1.Zynq-7000 SoC First Generation Architecture The Zynq®-7000 family is based on the Xilinx SoC architecture. These products integrate a feature-rich dual-core or single-core ARM® Cortex™-A9 based processing system (PS) and 28 nm Xilinx programmable logic (PL) in a single device. The ARM Cortex-A9 CPUs are the heart of the PS and also include on-chip memory, external memory interfaces, and a rich set of peripheral connectivity interfaces
2.Zynq-7000 Family Description The Zynq-7000 family offers the flexibility and scalability of an FPGA, while providing performance, power, and ease of use typically associated with ASIC and ASSPs. The range of devices in the Zynq-7000 family allows designers to target cost-sensitive as well as high-performance applications from a single platform using industry-standard tools. While each device in the Zynq-7000 family contains the same PS, the PL and I/O resources vary between the devices. As a result, the Zynq-7000 and Zynq-7000S SoCs are able to serve a wide range of applications including: • Automotive driver assistance, driver information, and infotainment • Broadcast camera • Industrial motor control, industrial networking, and machine vision • IP and Smart camera • LTE radio and baseband • Medical diagnostics and imaging • Multifunction printers • Video and night vision equipment The Zynq-7000 architecture enables implementation of custom logic in the PL and custom software in the PS. It allows for the realization of unique and differentiated system functions. The integration of the PS with the PL allows levels of performance that two-chip solutions (e.g., an ASSP with an FPGA) cannot match due to their limited I/O bandwidth, latency, and power budgets. Xilinx offers a large number of soft IP for the Zynq-7000 family. Stand-alone and Linux device drivers are available for the peripherals in the PS and the PL. The Vivado® Design Suite development environment enables a rapid product development for software, hardware, and systems engineers. Adoption of the ARM-based PS also brings a broad range of third-party tools and IP providers in combination with Xilinx’s existing PL ecosystem. The inclusion of an application processor enables high-level operating system support, e.g., Linux. Other standard operating systems used with the Cortex-A9 processor are also available for the Zynq-7000 family. The PS and the PL are on separate power domains, enabling the user of these devices to power down the PL for power management if required. The processors in the PS always boot first, allowing a software centric approach for PL configuration. PL configuration is managed by software running on the CPU, so it boots similar to an ASSP.
3.Figure 1 illustrates the functional blocks of the Zynq-7000 architecture
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Shenzhen Hongxinwei Technology Co., Ltd
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