|Place of Origin:
|Minimum Order Quantity:
|T/T, Western Union
|LED Lighting Driver
|Number Of Channels:
|Factory Pack Quantity:
2.2MHz Lighting Driver,
1 Channel WLED Driver
1• 2.9-V to 18-V Input Voltage Range
• 3-A, 40-V Internal Power Switch
– Four 3-W LEDs From 5-V Input
– Eight 3-W LEDs From 12-V Input
• High-Efficiency Power Conversion: Up to 93%
• Frequency Set by External Resistor: 200 kHz to
• User-Defined Soft Start Into Full Load
• Programmable Overvoltage Protection
• Analog and Pure PWM Brightness Dimming
• 14-Pin HTSSOP Package With PowerPAD
• Monitor Backlight
• 1-W or 3-W High-Brightness LED
3 Description The TPS61500 is a monolithic switching regulator with integrated 3-A, 40-V power switch. It is an ideal driver for high brightness 1-W or 3-W LED. The device has a wide input voltage range to support application with input voltage from multi-cell batteries or regulated 5-V or 12-V power rails
4.Pin Configuration and Functions
The TPS61500 integrates a 3-A, 40-V low side switch FET for driving up to 10 high-brightness LEDs in series. The device regulates the FB pin voltage at 200 mV with current mode pulse width modulation (PWM) control, and the LED current is sensed through a low-value resistor in series with LEDs. The PWM control circuitry turns on the switch at the beginning of each switching cycle. The input voltage is applied across the inductor and stores the energy as inductor current ramps up. During this portion of the switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the threshold set by the error amplifier output, the power switch turns off and the external Schottky diode is forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load current. This operation repeats each switching cycle. As shown in Functional Block Diagram, the duty cycle of the converter is determined by the PWM control comparator which compares the error amplifier output and the current signal. The switching frequency is programmed by the external resistor. A ramp signal from the oscillator is added to the current ramp. This slope compensation is necessary to avoid sub-harmonic oscillation that is intrinsic to the current mode control at duty cycle higher than 50%. The feedback loop regulates the FB pin to a reference voltage through an error amplifier. The output of the error amplifier is connected to the COMP pin. An external compensation network is connected to the COMP pin to optimize the feedback loop for stability and transient response.
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